Examine the heated question of chip-scale packaging in the LED industry (MAGAZINE)
John Cafferkey discusses the growing popularity of CSP LEDs for general lighting and how thermal management solutions need to adapt to keep pace.
JOHN CAFFERKEY discusses the growing popularity of CSP LEDs for general lighting and how thermal management solutions need to adapt to keep pace.
The primary reason LEDs are sold as a packaged product is to protect the fragile bare die from damage. Standardized packaging also makes it far easier for manufacturers to work with LEDs on production lines. However, there is another consideration: LEDs are only around 40% efficient, which means 60% of the power that goes into an LED will come out as heat. As with any electronic device, too much heat can cause serious damage so it needs removing as quickly as possible. This is where thermal management comes in. As LEDs increase in power while shrinking in size, thermal management becomes a critical aspect of LED packaging. The solid-state lighting (SSL) industry has long dealt with the thermal challenges of mid- and high-power LEDs, but the latest move to a chip-scale package (CSP) has introduced all new thermal design challenges.
LED package evolution
Early LEDs used through-hole packaging. The die was mounted onto an anvil and post structure and covered in an epoxy lens. The negative and positive anvil and post were then pushed through holes drilled in a printed-circuit board (PCB) and soldered into place. This type of package was ubiquitous throughout the early development of LEDs and is still used for applications such as power indicators today.
With ever-increasing automation, manufacturers needed LEDs capable of being easily surface mounted, particularly for backlighting applications for TVs and monitors, which led to the development of plastic leaded chip carrier (PLCC) LEDs - low- and mid-power LEDs. These standardized PLCC LEDs were a victim of their own success as they were manufactured in such high volumes that there was a massive oversupply - with repercussions that still reverberate around the LED industry to this day.
One side effect of this excess capacity was LED manufacturers that looked to new markets to sell their PLCC LEDs, particularly the nascent general lighting market. Mid-power PLCC LEDs were well suited for replacement bulb and tube lighting applications, which in turn helped push the price of consumer LED lighting down (Fig. 1). A push from the LED manufacturers with huge stocks of LEDs to ship, coupled with incoming regulations banning inefficient technologies such as incandescent lighting, helped to create the perfect environment for LED lighting to go mainstream.
FIG. 1. Mid-power LEDs gained traction in general lighting
applications starting with replacement lamps.
As the market developed, the requirement for smaller, higher-power devices for applications such as automotive headlamps and spotlights grew. This in turn presented a new challenge for the LED manufacturers - how to keep the LED die cool enough to operate effectively. PLCC designs were not thermally conductive enough for the job, and while through-hole designs can be thermally effective they are not surface mountable, so they lacked scalability.
The industry turned to mounting the LED die, covered with an encapsulant, onto thermally conductive, but electrically isolating, submounts. These submounts were made from alumina (Al2O3) or aluminum nitride (AlN) and offered the required heat spreading ability while maintaining ease of surface mounting. These high-power LEDs (HP LEDs) provided the perfect solution, except for one significant downside: cost. And for AlN, in particular, that cost could be a showstopper.
The dilemma the industry faced was how to reduce the cost of mid- and high-power LEDs without compromising both the thermal requirements and the SMT advantages gained by using standardized packaging.
From ceramic packaged LEDs to CSP
The general semiconductor industry dealt with a similar challenge some time ago by switching to a chip-scale packaging technology. To make a CSP LED, the p and n junctions on the base of a flip-chip structure are metallized and the top and sides are covered with phosphor. Fig. 2 depicts the differing LED architectures. The finished CSP must be no more than 20% larger than the chip itself to qualify as a CSP (the next level is wafer-level packaging, WLP, where the package must be the same size as the chip). Clearly, elements of the traditional mid- and high-power LED had to be removed for it to slim down to a CSP LED. For HP LEDs, the ceramic submount and the lens had to be eliminated, and for PLCC it was the entire chip case that was eliminated.
FIG. 2. The structures of mid-power LEDs, high-power
LEDs, and CSP LEDs all differ considerably.
For mid-power PLCC LEDs, losing the chip case wasn't such a problem and for this reason mid-power CSPs have been operating happily in backlighting applications for several years. In 2015, Lumileds introduced a white CSP and started to push the technology into general lighting applications. They were followed by other manufacturers such as Samsung, Seoul Semiconductor, and Nichia. The market was (and remains) fluid and different manufacturers have competing visions of how the market will develop.
Samsung will sell arrays of four or more CSPs joined together, and Seoul has opted for the term wafer-level integrated chip on PCB (WICOP), while Nichia has branded its CSPs as direct mountable chips (DMC) and uniquely they only emit light from the top surface, reducing crosstalk. These different approaches make for a very dynamic market, one that industry analysts Yole Développement estimate will account for 34% of all HP LEDs by 2020. The products are beginning to find usage in a variety of applications including street lights (Fig. 3).
FIG. 3. CSP LEDs are being deployed in outdoor lighting applications
such as street lights, among many other uses.
CSP opportunities and challenges
However, the benefits of the CSP approach are not in doubt. In addition to being smaller, they are cheaper to produce. All this while the CSPs are still able to go through standard surface-mount technology (SMT) PCB assembly lines so the products can be used as direct replacements for PLCC and ceramic HP LEDs. CSPs allow Level 2 integrators (who tend to run PCB assembly lines to build modules with packaged LEDs) to enjoy many of the benefits usually only afforded to integrators working with bare die - the chip-on-board (COB) manufacturers. This isn't just about cost, although that is clearly a factor, but also about capability. To surface mount bare LED die requires semiconductor cleanroom facilities, whereas CSP LEDs can go down a standard PCB assembly line. The flexibility opens up the benefits of CSP LEDs to the whole of the Level 2 manufacturing base and provides a cost-effective alternative to standard packaged LEDs.
One interesting benefit of CSPs being so small is the ability to place them very close together to create extremely power-dense modules. The downside is such close groupings, combined with high-power LEDs and the lack of a heat-spreading ceramic layer, generate a lot of heat - anathema to electronic devices. The thermal challenge that had been mitigated by the LED packaging manufacturers with ceramic submounts now fell squarely into the lap of the Level 2 integrators. The only option open to Level 2 integrators was to mount the CSP LEDs onto a PCB with better thermal performance.
A new thermal approach is required
The LED industry uses thermally efficient metal-clad PCBs (MCPCBs) for most modules and arrays. MCPCBs are typically constructed from a sheet of aluminum (occasionally copper) usually around 1.5 mm thick with a thin sheet of copper, usually 30 m or so, glued on with a dielectric epoxy. This epoxy is filled with particles of a thermally conductive material such as AlN to increase its thermal performance without impacting the electrically isolating properties of the material.
At best this approach to manufacturing MCPCBs results in a thermal conductivity of around 100 W/mK - usually considerably less. While this performance is perfectly acceptable for most LED modules, the challenge with CSPs is exacerbated by the way they conduct heat. CSPs are a point heat source - their small size and high temperature mean they quickly saturate any substrate that doesn't have the requisite thermal conductivity, leaving the LED vulnerable to overheating.
The price of failing to deliver adequate thermal conductivity and having the LED chip overheat is a reduced lifetime, reduced reliability, poor light quality, and ultimately catastrophic failure. Clearly, there's a requirement for a board-level thermal management solution that can deal with the thermal profile of CSPs without adding too much cost, while maintaining manufacturability and the ability to use standard PCB assembly lines.
There is an alternative to the standard process of creating an MCPCB using a patented electro-chemical oxidation (ECO) process. For example, Cambridge Nanotherm converts the surface of aluminum into a layer of thermally conductive, but electrically isolating, ceramic. As this layer of Al2O3 has high electrical isolation, it only needs to be tens of microns thick to offer sufficient dielectric strength to meet most requirements. This combination of an exceptionally thin dielectric with a high thermal conductivity gives nanoceramic an exceptionally high thermal conductivity. With a thin layer of epoxy to attach the copper circuit layer, Nanotherm LC comes in with a thermal conductivity of 115 W/mK, ideal for power-dense CSP LED modules and arrays.
While CSP LEDs are continuing to gain traction in the industry, their uptake will necessarily be limited by thermal factors unless the industry adopts a new type of thermal management. Given the enormous opportunity for differentiation and cost saving through CSP LEDs, there's no doubt the industry will respond with appropriately innovative solutions. And in this regard nanoceramics are leading the charge.
JOHN CAFFERKEY is marketing manager at Cambridge Nanotherm (camnano.com).